Events
Real-world Applications of Formal Verification
- Venue:
Beaumont Estate Hotel, Burfield Road, Old Windsor, Berkshire, SL4 2JJ
- Date:
- Wed 22 Feb 2012
- Time:
- 1000 - 1700
- Cost:
No charge to attend
- Booking Details:
Register here
This full-day, seminar will be given by technical experts for verification experts.
Join Jasper Design Automation as we show you how to solve critical verification challenges using state-of-the-art formal technology.
The seminar will focus on real life problems that face design and verification engineers. We will discuss a range of issues you may encounter every day. Our team will show you how to use Jasper tools and technology to address verification issues such as:
• Formal verification of RTL blocks
• Debug and design exploration
• Post silicon debug and root cause analysis
• Verification of ARM-protocol based SOCs (AXI, AMBA, AHB, ACE)
• Verification of SOCs with complex memory sub-systems (DDRxx)
• Verification of designs including power-management structures
• SoC and IP connectivity
• Control status registers
• Functional Verification closure and coverage
• Clock domain crossing
• X-propagation
A light breakfast will be served as well as lunch.
At the end of the event, we will have a draw for an iPad 2 for those in attendance.
More details here