Fact: There are fundamental changes in sight that will have
a far-reaching impact for design and manufacturing in the semiconductor
industry. At nodes at or below 45nm significant changes take place.
At the device level variability means that there will be significant
parametric differences from device to device on the same wafer.
Theme: The industry must learn "how to cope" with
variability issues across three major areas: chip design, design automation
tools and manufacturing technology How prepared is your organisation
to understand the implications of these changes and manage the impact?
NMI in collaboration with the UK e-Science Pilot Project - “Meeting
the Design Challenges of NanoCMOS Electronics” is providing
a unique opportunity for system, chip and device designers, technology
developers, EDA suppliers and wafer foundries to gain crucial insight
from recoginised world experts from:
IMEC
IBM Watson Centre
STARC Japan
Synopsys
TSMC
Freescale
Mentor Graphics
Cadence
ARM
University of Glasgow
(E-Science Project)
University of Manchester
Networking with your peers cannot be understated - can you afford
to miss it?
