|
Demand for highly complex RF IC designs is increasing rapidly with
the huge proliferation of wireless products now available. However,
today’s RF circuits bear little resemblance to those of 10
years ago - complexity has increased by orders of magnitude, frequency
ranges and rates have multiplied and the challenges of power and
noise are ever increasing. This event will look at practical solutions
and support of the RF IC design process across simulation, verification,
layout, test and foundry.
Unfortunately, the supply of RF design engineers is not growing
at a rate to match the increasing wireless product demand.
“Where will our future RF engineers and researchers come from
and how can we all play our part?”
|
|
10:00 Registration and Refreshments
10:30 Welcome & Introduction
Julie Stockwin, NMI
10:45 Fine-grain IC power management
for 65nm and below
James Brodrick, Toric
11:15 RF Layout and Signal
Integrity at 90nm
Adrian O'Shaughnessy, IC Mask
Design
11:45 Deep-submicron and RFCMOS
in the real world
Ian Dedic, Fujitsu Microelectronics
12:15 Buffet Lunch & Networking
13:30 RF Circuits from Digital
Cells
Peter Saul, Saul Research
14:00 Thick-Film Hybrid RFICs
to 100GHz
Charles Free, University of
Surrey
14:30 TBC
15:00 Panel Discussion
“Where will our future RF engineers and researchers come from
and how can we all play our part?”
16:00 End
of Panel Session & Further Networking
As always, in addition to the presentations and panel discussion
session, there will be the opportunity to network with attendees
from fabless semiconductor manufacturers, IDMs, tool suppliers,
foundries, design services, IP providers, research and academic
institutions.
If you would like to attend, please register via email to Julie
Stockwin
|