National Microelectronics Institute

Design Innovation

Verification

Network Definition

Verification is a fundamental activity for all organisations involved in microelectronics design – especially leading edge digital and mixed signal. A wealth of studies and anecdotal evidence illustrate the increasing resources that verification consumes – figures as of to day quote up to 80% of the overall design cycle time. This ‘non-value added’ activity must be tackled effectively to manage the economics of product creation and mitigate risks associated with design complexity.

Companies have a large choice of evolving tools, languages, methodologies and standards to choose with significant domain-specific influences. The UK has a formidable heritage and competency in complex chip design complemented with a strong research, academic base and leading EDA vendors. This network provides a forum for knowledge exchange, business development and collaboration within a crucial area of the design process

Network Manager

Robin Kennedy

Technical Advisor

Dr Mike Bartley, TVS

Events

Forthcoming

1st July (date TBC) : "Verification Roadmapping Projects" more details

Recent

DVClub : 18th January 2010, Bristol/Cambridge, "Coverage Closure"

2009

DVClub : 14th September 2009, Bristol/Cambridge, "Verification Management"

DVClub : 22nd April 2009, UWE, Bristol, Verification Methodology

26th February 2009 Low-Power Verification

DVClub : 21st January 2009, UWE, Bristol, "Property Checking"

 

Past

2008 Mission-Critical Verification

2007 Mixed-Signal Verification


Other Activities

Call for participation - IEEE1647 e language standards group

This group needs more members to help shape the standardisation of the e language. NMI members are already involved via Darren Galpin (chairman) and Serrie Chapman, both at Infineon, but more are needed. Participation is simply an hour-long toll-free conference call once a month. More details are in the Call for Participation and on the IEEE 1647 website

DVClub

The NMI is pleased to be supporting TVS to promote the newly formed UK chapter of DVClub; lunchtime briefings on verification. Contact Mike Bartley  for more information.

Verification Roadmapping Project

Click here to link to the project page

Cadence logoMentor Graphics logo Synopsys User Group meeting

ms office purchase Thunderhead Engineering PyroSim 2008 Stonecube PrintDevizor 2.2