Motivation:
Verification is a fundamental activity for all organisations involved
in microelectronics design – especially leading edge digital
and mixed signal. A wealth of studies and anecdotal evidence illustrate
the increasing resources that verification consumes – figures
as of to day quote up to 80% of the overall design cycle time. This
‘non-value added’ activity must be tackled effectively
to manage the economics of product creation and mitigate risks associated
with design complexity.
Description: Company’s
have a large choice of evolving tools, languages, methodologies
and standards to choose with significant domain-specific influences.
The UK has a formidable heritage and competency in complex chip
design complemented with a strong research, academic base and leading
EDA vendors. This network provides a forum for knowledge exchange,
business development and collaboration within a crucial area of
design.
Click Here
to be notified about future network meetings.
The Verification
Network Page, including details of our Verification Roadmapping
project and Future Events, can be found here.
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